Marco Venere

PhD Candidate in Quantum Computing

Exploring the intersection of Quantum Computing and Electronic Design Automation. Research projects on quantum algorithms, quantum error correction, and hardware acceleration with FPGAs.

Marco Venere

Research Areas

My research focuses on the convergence of quantum computing and classical computing systems, developing novel algorithms and hardware solutions for the quantum era.

Quantum Error Correction

Developing hardware accelerators for quantum error correction algorithms, including FPGA implementations of the Sparse Blossom Algorithm for real-time quantum error correction.

Quantum Algorithms for Hardware Design

Developing novel quantum algorithms for EDA toolchains, achieving super-polynomial speedups for circuit design and library mapping problems.

Hardware Acceleration

Designing reconfigurable architectures and GPU-based frameworks for biomedical applications, quantum computing, and peer-to-peer DMA infrastructures.

Selected Publications

Recent contributions to quantum computing and hardware acceleration research

A Grover-meets-Simon Approach to Match Vector Boolean Functions

Marco Venere, Alessandro Barenghi, Gerardo Pelosi

IEEE Transactions on Quantum Engineering (TQE)

August 2025

View Paper

DDRoute: a Novel Depth-Driven Approach to the Qubit Routing Problem

Alessandro Annechini, Marco Venere, Donatella Sciuto, Marco D. Santambrogio

Proceedings of the 62nd IEEE/ACM Design Automation Conference (DAC)

June 2025

View Paper

Rock the QASBA: Quantum Error Correction Acceleration via the Sparse Blossom Algorithm on FPGAs

Marco Venere, Beatrice Branchini, Davide Conficconi, Donatella Sciuto, Marco D. Santambrogio

ACM Transactions on Reconfigurable Technology and Systems (TRETS)

March 2025

View Paper

Characterizing the Effects of Zero-Noise Extrapolation on a QAOA Workflow

Marco Venere, Adriano Lusso, Victor Onofre, Alberto Maldonado-Romo, Marco D. Santambrogio

2024 IEEE International Conference on Quantum Computing and Engineering (QCE)

September 2024

View Paper

QABE: a Framework for Quantum Annealer Programming and Benchmarking

Gianluca Scanu, Marco Venere, Donatella Sciuto, Marco D. Santambrogio

2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)

June 2025

View Paper

A Quantum Method to Match Vector Boolean Functions using Simon's Solver

Marco Venere, Alessandro Barenghi, Gerardo Pelosi

2024 IEEE 42nd International Conference on Computer Design (ICCD)

November 2024

View Paper

Hephaestus: Codesigning and Automating 3D Image Registration on Reconfigurable Architectures

Giuseppe Sorrentino, Marco Venere, Davide Conficconi, Eleonora D'Arnese, Marco D. Santambrogio

ACM Transactions on Embedded Computing Systems, 22(5s), 1-24

September 2023

View Paper

Athena: a gpu-based framework for biomedical 3d rigid image registration

Giuseppe Sorrentino, Marco Venere, Eleonora D'Arnese, Davide Conficconi, Isabela Poles, Marco D. Santambrogio

2023 IEEE Biomedical Circuits and Systems Conference (BioCAS)

October 2023

View Paper

Experience

Sep 2025 - Current

Visiting PhD Student

Center for Theoretical Physics - Massachusetts Institute of Technology (MIT)

Working in Quantum Information under the supervision of Prof. Soonwon Choi.

Jan 2025 - Jul 2025

Research Intern

Inveriant - Spin-Off from Centre for Quantum Technologies (CQT), University of Singapore

Design of novel algorithms for quantum machine learning and benchmarking of state-of-the-art quantum processing units.

Sep 2023 - Feb 2024

Research Intern

Advanced Micro Devices (AMD), Dublin, Ireland

Design of peer-to-peer DMA infrastructure between FPGAs and GPUs, with RDMA-based communication among multiple peers.

Sep 2023 - Current

PhD Student

Politecnico di Milano

Research in Quantum Computing, Quantum Error Correction, and Hardware Design under supervision of Prof. Marco Domenico Santambrogio. Chair of IEEE Italy Section Student Branch.

Nov 2020 - Mar 2021

Mobile Developer

Gestione Impresa S.r.L., Italy

Native Android app development using Java and XML, REST API integration, UI design, and concurrent programming.

Teaching & Mentoring

Sharing knowledge in quantum computing and software engineering

Quantum Computing Lecturer

NECSTLab and MathWorks, Inc. | May 2023 - Current

Lecturer for "Passion in Action Quantum Computing: A Practical Perspective" and "Quantum Information Processing 101", teaching MATLAB Support Package for Quantum Computing and leading student optimization projects on quantum computers.

Student Tutor - Quantum Computing

NECSTCamp, Leonardo Project | Feb 2023 - Current

Tutoring students in Advanced Computer Architectures, High Performance processors and systems, and Multidisciplinary Project focusing on Quantum Computing and Hardware Acceleration.

Teaching Assistant

Software Engineering Course | Feb 2023 - Jul 2023

Teaching assistant for "Prova Finale (Ingegneria del Software)" under Prof. Pierluigi San Pietro, focusing on software engineering principles and project evaluation.

Awards & Recognition

Second Place - DAC PhD Forum

Design Automation Conference (DAC) 2025

Best Poster Award

Reconfigurable Architectures Workshop (RAW) 2025

Best Poster Award

Reconfigurable Architectures Workshop (RAW) 2024

UnitaryFund MicroGrant

Integration of Zero-Noise Extrapolation from Mitiq into OpenQAOA

Graduation Prize

"Fondazione Grazioli", Classe di Scienze Matematiche e Naturali

Xilinx Open Hardware Finalist

PhD Category 2023

Xilinx Open Hardware Winner

PYNQ Category 2022

Apple Foundation Program

First Classified, Class E1, 2021

Contact & Collaboration

Get in Touch

Email

marco.venere@polimi.it

Institution

Politecnico di Milano

Department of Electronics, Information and Bioengineering

Research Interests

Quantum Computing Quantum Error Correction FPGA Design EDA Toolchains Hardware Acceleration Quantum Algorithms

Collaboration Opportunities

I'm always interested in collaborating on research projects related to quantum computing, hardware acceleration, and the intersection of quantum algorithms with classical EDA toolchains.

Whether you're looking to explore quantum error correction implementations, discuss novel quantum algorithms, or collaborate on hardware design projects, feel free to reach out!